SQ_VOP3_0_SDST_ENC__OP__SHIFT 3018 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_VOP3_0_SDST_ENC__OP__SHIFT                                                                         0x10
SQ_VOP3_0_SDST_ENC__OP__SHIFT 2868 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_VOP3_0_SDST_ENC__OP__SHIFT                                                                         0x10
SQ_VOP3_0_SDST_ENC__OP__SHIFT 2826 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQ_VOP3_0_SDST_ENC__OP__SHIFT                                                                         0x10
SQ_VOP3_0_SDST_ENC__OP__SHIFT 9835 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define SQ_VOP3_0_SDST_ENC__OP__SHIFT 0x00000011
SQ_VOP3_0_SDST_ENC__OP__SHIFT 13070 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SQ_VOP3_0_SDST_ENC__OP__SHIFT 0x11
SQ_VOP3_0_SDST_ENC__OP__SHIFT 14978 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SQ_VOP3_0_SDST_ENC__OP__SHIFT 0x10
SQ_VOP3_0_SDST_ENC__OP__SHIFT 15376 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SQ_VOP3_0_SDST_ENC__OP__SHIFT 0x10