SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT 31495 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT                                                          0xc
SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT 21663 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT                                                          0xc
SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT 22996 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT                                                          0xc
SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT 22963 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT                                                          0xc
SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT 9319 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT 0x0000000c
SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT 11904 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT 0xc
SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT 13750 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT 0xc
SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT 14148 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SQ_PERFCOUNTER3_SELECT__SQC_BANK_MASK__SHIFT 0xc