SQ_EDC_CNT__VGPR1_SEC_COUNT__SHIFT 8182 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SQ_EDC_CNT__VGPR1_SEC_COUNT__SHIFT                                                                    0x10
SQ_EDC_CNT__VGPR1_SEC_COUNT__SHIFT 3235 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_EDC_CNT__VGPR1_SEC_COUNT__SHIFT                                                                    0x10
SQ_EDC_CNT__VGPR1_SEC_COUNT__SHIFT 3085 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_EDC_CNT__VGPR1_SEC_COUNT__SHIFT                                                                    0x10