SQ_EDC_CNT__VGPR0_SEC_COUNT__SHIFT 8180 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SQ_EDC_CNT__VGPR0_SEC_COUNT__SHIFT                                                                    0xc
SQ_EDC_CNT__VGPR0_SEC_COUNT__SHIFT 3233 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_EDC_CNT__VGPR0_SEC_COUNT__SHIFT                                                                    0xc
SQ_EDC_CNT__VGPR0_SEC_COUNT__SHIFT 3083 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_EDC_CNT__VGPR0_SEC_COUNT__SHIFT                                                                    0xc