SQ_EDC_CNT__SGPR_SEC_COUNT_MASK 8192 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SQ_EDC_CNT__SGPR_SEC_COUNT_MASK                                                                       0x00000300L
SQ_EDC_CNT__SGPR_SEC_COUNT_MASK 3245 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_EDC_CNT__SGPR_SEC_COUNT_MASK                                                                       0x00000300L
SQ_EDC_CNT__SGPR_SEC_COUNT_MASK 3095 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_EDC_CNT__SGPR_SEC_COUNT_MASK                                                                       0x00000300L