SQ_DSM_CNTL__SGPR_ENABLE_SINGLE_WRITE__SHIFT 7721 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SQ_DSM_CNTL__SGPR_ENABLE_SINGLE_WRITE__SHIFT                                                          0xa
SQ_DSM_CNTL__SGPR_ENABLE_SINGLE_WRITE__SHIFT 2171 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_DSM_CNTL__SGPR_ENABLE_SINGLE_WRITE__SHIFT                                                          0xa
SQ_DSM_CNTL__SGPR_ENABLE_SINGLE_WRITE__SHIFT 2021 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_DSM_CNTL__SGPR_ENABLE_SINGLE_WRITE__SHIFT                                                          0xa
SQ_DSM_CNTL__SGPR_ENABLE_SINGLE_WRITE__SHIFT 2044 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQ_DSM_CNTL__SGPR_ENABLE_SINGLE_WRITE__SHIFT                                                          0xa
SQ_DSM_CNTL__SGPR_ENABLE_SINGLE_WRITE__SHIFT 13572 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SQ_DSM_CNTL__SGPR_ENABLE_SINGLE_WRITE__SHIFT 0xa
SQ_DSM_CNTL__SGPR_ENABLE_SINGLE_WRITE__SHIFT 13970 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SQ_DSM_CNTL__SGPR_ENABLE_SINGLE_WRITE__SHIFT 0xa