SQ_DPP_ROW_SR5   3565 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_enum.h #define SQ_DPP_ROW_SR5                            0x115
SQ_DPP_ROW_SR5   3583 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h #define SQ_DPP_ROW_SR5                            0x115
SQ_DPP_ROW_SR5   18194 drivers/gpu/drm/amd/include/vega10_enum.h #define SQ_DPP_ROW_SR5                 0x00000115