SQ_DPP_ROW_RR1 3576 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_enum.h #define SQ_DPP_ROW_RR1 0x121 SQ_DPP_ROW_RR1 3594 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_enum.h #define SQ_DPP_ROW_RR1 0x121 SQ_DPP_ROW_RR1 18205 drivers/gpu/drm/amd/include/vega10_enum.h #define SQ_DPP_ROW_RR1 0x00000121