SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT 3493 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT                                                                  0xc
SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT 3343 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT                                                                  0xc
SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT 3211 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT                                                                  0xc
SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT 8745 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT 0x0000000c
SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT 12260 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT 0xc
SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT 14108 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT 0xc
SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT 14506 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT__SHIFT 0xc