SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 3505 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 0x00007000L SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 3355 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 0x00007000L SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 3223 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 0x00007000L SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 8744 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 0x00007000L SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 12259 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 0x7000 SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 14107 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 0x7000 SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 14505 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SQ_BUF_RSRC_WORD3__NUM_FORMAT_MASK 0x7000