SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT 3498 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT                                                              0x17
SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT 3348 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT                                                              0x17
SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT 3216 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT                                                              0x17
SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT 8721 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT 0x00000017
SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT 12268 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT 0x17
SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT 14116 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT 0x17
SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT 14514 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SQ_BUF_RSRC_WORD3__ADD_TID_ENABLE__SHIFT 0x17