SQC_ICACHE_UTCL1_CNTL2__PERF_EVENT_RD_WR_MASK 3738 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQC_ICACHE_UTCL1_CNTL2__PERF_EVENT_RD_WR_MASK 0x00080000L SQC_ICACHE_UTCL1_CNTL2__PERF_EVENT_RD_WR_MASK 3588 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQC_ICACHE_UTCL1_CNTL2__PERF_EVENT_RD_WR_MASK 0x00080000L SQC_ICACHE_UTCL1_CNTL2__PERF_EVENT_RD_WR_MASK 3454 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQC_ICACHE_UTCL1_CNTL2__PERF_EVENT_RD_WR_MASK 0x00080000L