SQC_EDC_CNT2__INST_BANKA_MISS_FIFO_SED_COUNT_MASK 2578 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQC_EDC_CNT2__INST_BANKA_MISS_FIFO_SED_COUNT_MASK                                                     0x000C0000L
SQC_EDC_CNT2__INST_BANKA_MISS_FIFO_SED_COUNT_MASK 2428 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQC_EDC_CNT2__INST_BANKA_MISS_FIFO_SED_COUNT_MASK                                                     0x000C0000L