SQC_EDC_CNT2__DATA_BANKA_HIT_FIFO_SED_COUNT_MASK 2579 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQC_EDC_CNT2__DATA_BANKA_HIT_FIFO_SED_COUNT_MASK                                                      0x00300000L
SQC_EDC_CNT2__DATA_BANKA_HIT_FIFO_SED_COUNT_MASK 2429 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQC_EDC_CNT2__DATA_BANKA_HIT_FIFO_SED_COUNT_MASK                                                      0x00300000L