SQC_DCACHE_UTCL1_CNTL2__SPARE__SHIFT 3776 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQC_DCACHE_UTCL1_CNTL2__SPARE__SHIFT                                                                  0x0
SQC_DCACHE_UTCL1_CNTL2__SPARE__SHIFT 3626 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQC_DCACHE_UTCL1_CNTL2__SPARE__SHIFT                                                                  0x0
SQC_DCACHE_UTCL1_CNTL2__SPARE__SHIFT 3492 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQC_DCACHE_UTCL1_CNTL2__SPARE__SHIFT                                                                  0x0