SQC_DCACHE_UTCL1_CNTL2__PERF_EVENT_RD_WR_MASK 3802 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SQC_DCACHE_UTCL1_CNTL2__PERF_EVENT_RD_WR_MASK                                                         0x00080000L
SQC_DCACHE_UTCL1_CNTL2__PERF_EVENT_RD_WR_MASK 3652 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SQC_DCACHE_UTCL1_CNTL2__PERF_EVENT_RD_WR_MASK                                                         0x00080000L
SQC_DCACHE_UTCL1_CNTL2__PERF_EVENT_RD_WR_MASK 3516 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SQC_DCACHE_UTCL1_CNTL2__PERF_EVENT_RD_WR_MASK                                                         0x00080000L