SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK 8582 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK                                                                0x7FFFFFFFL
SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK 4329 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK                                                                0x7FFFFFFFL
SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK 3814 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK                                                                0x7FFFFFFFL
SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK 3720 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK                                                                0x7FFFFFFFL
SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK 10949 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK 0x7fffffff
SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK 12673 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK 0x7fffffff
SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK 13071 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SPI_WF_LIFETIME_STATUS_5__MAX_CNT_MASK 0x7fffffff