SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 19704 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT                                                                0x0
SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 12435 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT                                                                0x0
SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 13761 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT                                                                0x0
SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 13626 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT                                                                0x0
SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 8952 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 0x0
SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 10572 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 0x0
SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 10970 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_5__VGPR__SHIFT 0x0