SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT 19660 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT                                                                0x0
SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT 12391 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT                                                                0x0
SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT 13717 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT                                                                0x0
SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT 13582 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT                                                                0x0
SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT 8912 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT 0x0
SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT 10532 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT 0x0
SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT 10930 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SPI_RESOURCE_RESERVE_CU_1__VGPR__SHIFT 0x0