SPI_PS_IN_CONTROL__PARAM_GEN_MASK 23732 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SPI_PS_IN_CONTROL__PARAM_GEN_MASK 0x00000040L SPI_PS_IN_CONTROL__PARAM_GEN_MASK 16329 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SPI_PS_IN_CONTROL__PARAM_GEN_MASK 0x00000040L SPI_PS_IN_CONTROL__PARAM_GEN_MASK 17660 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SPI_PS_IN_CONTROL__PARAM_GEN_MASK 0x00000040L SPI_PS_IN_CONTROL__PARAM_GEN_MASK 17535 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SPI_PS_IN_CONTROL__PARAM_GEN_MASK 0x00000040L SPI_PS_IN_CONTROL__PARAM_GEN_MASK 7688 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define SPI_PS_IN_CONTROL__PARAM_GEN_MASK 0x00000040L SPI_PS_IN_CONTROL__PARAM_GEN_MASK 8721 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SPI_PS_IN_CONTROL__PARAM_GEN_MASK 0x40 SPI_PS_IN_CONTROL__PARAM_GEN_MASK 10323 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SPI_PS_IN_CONTROL__PARAM_GEN_MASK 0x40 SPI_PS_IN_CONTROL__PARAM_GEN_MASK 10721 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SPI_PS_IN_CONTROL__PARAM_GEN_MASK 0x40