SPI_CSQ_WF_ACTIVE_COUNT_5__EVENTS__SHIFT 8722 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SPI_CSQ_WF_ACTIVE_COUNT_5__EVENTS__SHIFT                                                              0x10
SPI_CSQ_WF_ACTIVE_COUNT_5__EVENTS__SHIFT 4476 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SPI_CSQ_WF_ACTIVE_COUNT_5__EVENTS__SHIFT                                                              0x10
SPI_CSQ_WF_ACTIVE_COUNT_5__EVENTS__SHIFT 3956 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SPI_CSQ_WF_ACTIVE_COUNT_5__EVENTS__SHIFT                                                              0x10
SPI_CSQ_WF_ACTIVE_COUNT_5__EVENTS__SHIFT 3862 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SPI_CSQ_WF_ACTIVE_COUNT_5__EVENTS__SHIFT                                                              0x10