SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK 20364 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK                                                                 0xFFFF0000L
SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK 21697 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK                                                                 0xFFFF0000L
SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK 21627 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK                                                                 0xFFFF0000L
SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK 7486 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK 0xffff0000L
SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK 9261 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK 0xffff0000
SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK 10981 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK 0xffff0000
SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK 11379 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SPI_CONFIG_CNTL_1__PC_LIMIT_SIZE_MASK 0xffff0000