SPI_ARB_CYCLES_0__TS0_DURATION_MASK 19596 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK                                                                   0x0000FFFFL
SPI_ARB_CYCLES_0__TS0_DURATION_MASK 12201 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK                                                                   0x0000FFFFL
SPI_ARB_CYCLES_0__TS0_DURATION_MASK 13653 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK                                                                   0x0000FFFFL
SPI_ARB_CYCLES_0__TS0_DURATION_MASK 13403 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK                                                                   0x0000FFFFL
SPI_ARB_CYCLES_0__TS0_DURATION_MASK 7438 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_sh_mask.h #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK 0x0000ffffL
SPI_ARB_CYCLES_0__TS0_DURATION_MASK 8785 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_sh_mask.h #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK 0xffff
SPI_ARB_CYCLES_0__TS0_DURATION_MASK 10387 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_sh_mask.h #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK 0xffff
SPI_ARB_CYCLES_0__TS0_DURATION_MASK 10785 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_sh_mask.h #define SPI_ARB_CYCLES_0__TS0_DURATION_MASK 0xffff