SOFT_REGISTERS_TABLE_20__VCEDpmEnabledLevels__SHIFT 3600 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define SOFT_REGISTERS_TABLE_20__VCEDpmEnabledLevels__SHIFT 0x0
SOFT_REGISTERS_TABLE_20__VCEDpmEnabledLevels__SHIFT 3598 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define SOFT_REGISTERS_TABLE_20__VCEDpmEnabledLevels__SHIFT 0x0
SOFT_REGISTERS_TABLE_20__VCEDpmEnabledLevels__SHIFT 3760 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define SOFT_REGISTERS_TABLE_20__VCEDpmEnabledLevels__SHIFT 0x0
SOFT_REGISTERS_TABLE_20__VCEDpmEnabledLevels__SHIFT 3428 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define SOFT_REGISTERS_TABLE_20__VCEDpmEnabledLevels__SHIFT 0x0