SMU_BIF_VDDGFX_PWR_STATUS__VDDGFX_GFX_PWR_OFF_MASK  599 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define SMU_BIF_VDDGFX_PWR_STATUS__VDDGFX_GFX_PWR_OFF_MASK 0x1
SMU_BIF_VDDGFX_PWR_STATUS__VDDGFX_GFX_PWR_OFF_MASK  569 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h #define SMU_BIF_VDDGFX_PWR_STATUS__VDDGFX_GFX_PWR_OFF_MASK 0x1
SMU_BIF_VDDGFX_PWR_STATUS__VDDGFX_GFX_PWR_OFF_MASK 17628 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define SMU_BIF_VDDGFX_PWR_STATUS__VDDGFX_GFX_PWR_OFF_MASK                                                    0x00000001L
SMU_BIF_VDDGFX_PWR_STATUS__VDDGFX_GFX_PWR_OFF_MASK 117904 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define SMU_BIF_VDDGFX_PWR_STATUS__VDDGFX_GFX_PWR_OFF_MASK                                                    0x00000001L