SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en__SHIFT  440 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en__SHIFT 0x1
SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en__SHIFT  436 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en__SHIFT 0x1
SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en__SHIFT  436 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en__SHIFT 0x1
SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en__SHIFT  454 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en__SHIFT 0x1
SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en__SHIFT  452 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en__SHIFT 0x1
SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en__SHIFT  480 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en__SHIFT 0x1