SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en_MASK  439 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en_MASK 0x2
SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en_MASK  435 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en_MASK 0x2
SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en_MASK  435 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en_MASK 0x2
SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en_MASK  453 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en_MASK 0x2
SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en_MASK  451 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en_MASK 0x2
SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en_MASK  479 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define SMC_SYSCON_CLOCK_CNTL_0__auto_cg_en_MASK 0x2