SMC_RESP_0__SMC_RESP__SHIFT  283 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define SMC_RESP_0__SMC_RESP__SHIFT 0x00000000
SMC_RESP_0__SMC_RESP__SHIFT  362 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define SMC_RESP_0__SMC_RESP__SHIFT 0x0
SMC_RESP_0__SMC_RESP__SHIFT  358 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define SMC_RESP_0__SMC_RESP__SHIFT 0x0
SMC_RESP_0__SMC_RESP__SHIFT  358 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define SMC_RESP_0__SMC_RESP__SHIFT 0x0
SMC_RESP_0__SMC_RESP__SHIFT  376 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define SMC_RESP_0__SMC_RESP__SHIFT 0x0
SMC_RESP_0__SMC_RESP__SHIFT  374 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define SMC_RESP_0__SMC_RESP__SHIFT 0x0
SMC_RESP_0__SMC_RESP__SHIFT  402 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define SMC_RESP_0__SMC_RESP__SHIFT 0x0