SMC_MSG_CONFIG_TDC_LIMIT   53 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_enum.h #define SMC_MSG_CONFIG_TDC_LIMIT                  0xe
SMC_MSG_CONFIG_TDC_LIMIT   60 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_enum.h #define SMC_MSG_CONFIG_TDC_LIMIT                  0xe
SMC_MSG_CONFIG_TDC_LIMIT   60 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_enum.h #define SMC_MSG_CONFIG_TDC_LIMIT                  0xe
SMC_MSG_CONFIG_TDC_LIMIT   57 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_enum.h #define SMC_MSG_CONFIG_TDC_LIMIT                  0xe