SMC_MESSAGE_5__SMC_MSG__SHIFT  380 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define SMC_MESSAGE_5__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_5__SMC_MSG__SHIFT  376 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define SMC_MESSAGE_5__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_5__SMC_MSG__SHIFT  376 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define SMC_MESSAGE_5__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_5__SMC_MSG__SHIFT  394 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define SMC_MESSAGE_5__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_5__SMC_MSG__SHIFT  392 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define SMC_MESSAGE_5__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_5__SMC_MSG__SHIFT  420 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define SMC_MESSAGE_5__SMC_MSG__SHIFT 0x0