SMC_MESSAGE_1__SMC_MSG__SHIFT  277 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define SMC_MESSAGE_1__SMC_MSG__SHIFT 0x00000000
SMC_MESSAGE_1__SMC_MSG__SHIFT  364 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define SMC_MESSAGE_1__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_1__SMC_MSG__SHIFT  360 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define SMC_MESSAGE_1__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_1__SMC_MSG__SHIFT  360 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define SMC_MESSAGE_1__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_1__SMC_MSG__SHIFT  378 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define SMC_MESSAGE_1__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_1__SMC_MSG__SHIFT  376 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define SMC_MESSAGE_1__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_1__SMC_MSG__SHIFT  404 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define SMC_MESSAGE_1__SMC_MSG__SHIFT 0x0