SMC_MESSAGE_10__SMC_MSG__SHIFT  416 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define SMC_MESSAGE_10__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_10__SMC_MSG__SHIFT  412 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define SMC_MESSAGE_10__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_10__SMC_MSG__SHIFT  412 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define SMC_MESSAGE_10__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_10__SMC_MSG__SHIFT  430 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define SMC_MESSAGE_10__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_10__SMC_MSG__SHIFT  428 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define SMC_MESSAGE_10__SMC_MSG__SHIFT 0x0
SMC_MESSAGE_10__SMC_MSG__SHIFT  456 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define SMC_MESSAGE_10__SMC_MSG__SHIFT 0x0