SMC_IND_DATA_0__SMC_IND_DATA__SHIFT  255 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define SMC_IND_DATA_0__SMC_IND_DATA__SHIFT 0x00000000
SMC_IND_DATA_0__SMC_IND_DATA__SHIFT  314 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define SMC_IND_DATA_0__SMC_IND_DATA__SHIFT 0x0
SMC_IND_DATA_0__SMC_IND_DATA__SHIFT  310 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define SMC_IND_DATA_0__SMC_IND_DATA__SHIFT 0x0
SMC_IND_DATA_0__SMC_IND_DATA__SHIFT  310 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define SMC_IND_DATA_0__SMC_IND_DATA__SHIFT 0x0
SMC_IND_DATA_0__SMC_IND_DATA__SHIFT  312 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define SMC_IND_DATA_0__SMC_IND_DATA__SHIFT 0x0
SMC_IND_DATA_0__SMC_IND_DATA__SHIFT  310 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define SMC_IND_DATA_0__SMC_IND_DATA__SHIFT 0x0
SMC_IND_DATA_0__SMC_IND_DATA__SHIFT  338 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define SMC_IND_DATA_0__SMC_IND_DATA__SHIFT 0x0