SMBUS_BLKWR_CMD_CTRL1__SMB_BLK_WR_CMD5__SHIFT  714 drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_sh_mask.h #define SMBUS_BLKWR_CMD_CTRL1__SMB_BLK_WR_CMD5__SHIFT                                                         0x8
SMBUS_BLKWR_CMD_CTRL1__SMB_BLK_WR_CMD5__SHIFT 1147 drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_sh_mask.h #define SMBUS_BLKWR_CMD_CTRL1__SMB_BLK_WR_CMD5__SHIFT                                                         0x8