SEM_STATUS__SWITCH_READY__SHIFT  240 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SEM_STATUS__SWITCH_READY__SHIFT 0x1f
SEM_STATUS__SWITCH_READY__SHIFT  364 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SEM_STATUS__SWITCH_READY__SHIFT 0x1f
SEM_STATUS__SWITCH_READY__SHIFT  971 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_1_sh_mask.h #define SEM_STATUS__SWITCH_READY__SHIFT                                                                       0x1f
SEM_STATUS__SWITCH_READY__SHIFT  965 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_sh_mask.h #define SEM_STATUS__SWITCH_READY__SHIFT                                                                       0x1f
SEM_STATUS__SWITCH_READY__SHIFT  993 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_5_0_0_sh_mask.h #define SEM_STATUS__SWITCH_READY__SHIFT                                                                       0x1f