SEM_STATUS__SEM_IDLE__SHIFT  202 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SEM_STATUS__SEM_IDLE__SHIFT 0x0
SEM_STATUS__SEM_IDLE__SHIFT  214 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SEM_STATUS__SEM_IDLE__SHIFT 0x0
SEM_STATUS__SEM_IDLE__SHIFT  208 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SEM_STATUS__SEM_IDLE__SHIFT 0x0
SEM_STATUS__SEM_IDLE__SHIFT  334 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SEM_STATUS__SEM_IDLE__SHIFT 0x0
SEM_STATUS__SEM_IDLE__SHIFT  947 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_1_sh_mask.h #define SEM_STATUS__SEM_IDLE__SHIFT                                                                           0x0
SEM_STATUS__SEM_IDLE__SHIFT  941 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_sh_mask.h #define SEM_STATUS__SEM_IDLE__SHIFT                                                                           0x0
SEM_STATUS__SEM_IDLE__SHIFT  969 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_5_0_0_sh_mask.h #define SEM_STATUS__SEM_IDLE__SHIFT                                                                           0x0