SEM_STATUS__CHECK0_FIFO_FULL__SHIFT  212 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SEM_STATUS__CHECK0_FIFO_FULL__SHIFT 0x5
SEM_STATUS__CHECK0_FIFO_FULL__SHIFT  224 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SEM_STATUS__CHECK0_FIFO_FULL__SHIFT 0x5
SEM_STATUS__CHECK0_FIFO_FULL__SHIFT  218 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SEM_STATUS__CHECK0_FIFO_FULL__SHIFT 0x5
SEM_STATUS__CHECK0_FIFO_FULL__SHIFT  344 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SEM_STATUS__CHECK0_FIFO_FULL__SHIFT 0x5
SEM_STATUS__CHECK0_FIFO_FULL__SHIFT  952 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_1_sh_mask.h #define SEM_STATUS__CHECK0_FIFO_FULL__SHIFT                                                                   0x5
SEM_STATUS__CHECK0_FIFO_FULL__SHIFT  946 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_sh_mask.h #define SEM_STATUS__CHECK0_FIFO_FULL__SHIFT                                                                   0x5
SEM_STATUS__CHECK0_FIFO_FULL__SHIFT  974 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_5_0_0_sh_mask.h #define SEM_STATUS__CHECK0_FIFO_FULL__SHIFT                                                                   0x5