SEM_MAILBOX_CONTROL__SIDEPORT_ENABLE_EXTRA_MASK  273 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SEM_MAILBOX_CONTROL__SIDEPORT_ENABLE_EXTRA_MASK 0xff0000
SEM_MAILBOX_CONTROL__SIDEPORT_ENABLE_EXTRA_MASK  271 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SEM_MAILBOX_CONTROL__SIDEPORT_ENABLE_EXTRA_MASK 0xff0000
SEM_MAILBOX_CONTROL__SIDEPORT_ENABLE_EXTRA_MASK  395 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SEM_MAILBOX_CONTROL__SIDEPORT_ENABLE_EXTRA_MASK 0xff0000