SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT  328 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT                                                              0x4
SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT 1030 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT 0x4
SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT 1120 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT 0x4
SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT 1140 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT 0x4
SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT 1646 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT 0x4
SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT  614 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_0_sh_mask.h #define SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT	0x4
SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT  613 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_1_sh_mask.h #define SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT                                                              0x4
SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT  622 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_2_sh_mask.h #define SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT                                                              0x4
SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT  616 drivers/gpu/drm/amd/include/asic_reg/sdma0/sdma0_4_2_sh_mask.h #define SDMA_POWER_GATING__PG_CNTL_STATUS__SHIFT                                                              0x4