SDMA1_VM_CNTL__CMD__SHIFT 40225 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_VM_CNTL__CMD__SHIFT                                                                             0x0
SDMA1_VM_CNTL__CMD__SHIFT 2244 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_VM_CNTL__CMD__SHIFT 0x0
SDMA1_VM_CNTL__CMD__SHIFT 2540 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_VM_CNTL__CMD__SHIFT 0x0
SDMA1_VM_CNTL__CMD__SHIFT   33 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_VM_CNTL__CMD__SHIFT	0x0
SDMA1_VM_CNTL__CMD__SHIFT   33 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_VM_CNTL__CMD__SHIFT                                                                             0x0
SDMA1_VM_CNTL__CMD__SHIFT   33 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_VM_CNTL__CMD__SHIFT                                                                             0x0