SDMA1_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT 3356 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT                                                           0x0
SDMA1_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT  864 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT	0x0
SDMA1_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT  882 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT                                                           0x0
SDMA1_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT  878 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT                                                           0x0