SDMA1_UTCL1_WR_STATUS__REQL2_IDLE__SHIFT 3265 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_UTCL1_WR_STATUS__REQL2_IDLE__SHIFT                                                              0x10
SDMA1_UTCL1_WR_STATUS__REQL2_IDLE__SHIFT  777 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_UTCL1_WR_STATUS__REQL2_IDLE__SHIFT	0x14
SDMA1_UTCL1_WR_STATUS__REQL2_IDLE__SHIFT  795 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_UTCL1_WR_STATUS__REQL2_IDLE__SHIFT                                                              0x14
SDMA1_UTCL1_WR_STATUS__REQL2_IDLE__SHIFT  791 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_UTCL1_WR_STATUS__REQL2_IDLE__SHIFT                                                              0x14