SDMA1_UTCL1_RD_STATUS__RQPG_XNACK_FIFO_FULL__SHIFT  718 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_UTCL1_RD_STATUS__RQPG_XNACK_FIFO_FULL__SHIFT	0x10
SDMA1_UTCL1_RD_STATUS__RQPG_XNACK_FIFO_FULL__SHIFT  736 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_UTCL1_RD_STATUS__RQPG_XNACK_FIFO_FULL__SHIFT                                                    0x10
SDMA1_UTCL1_RD_STATUS__RQPG_XNACK_FIFO_FULL__SHIFT  732 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_UTCL1_RD_STATUS__RQPG_XNACK_FIFO_FULL__SHIFT                                                    0x10