SDMA1_UTCL1_RD_STATUS__MERGE_STATE__SHIFT 3212 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_UTCL1_RD_STATUS__MERGE_STATE__SHIFT                                                             0x15
SDMA1_UTCL1_RD_STATUS__MERGE_STATE__SHIFT  725 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_UTCL1_RD_STATUS__MERGE_STATE__SHIFT	0x1a
SDMA1_UTCL1_RD_STATUS__MERGE_STATE__SHIFT  743 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_UTCL1_RD_STATUS__MERGE_STATE__SHIFT                                                             0x1a
SDMA1_UTCL1_RD_STATUS__MERGE_STATE__SHIFT  739 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_UTCL1_RD_STATUS__MERGE_STATE__SHIFT                                                             0x1a