SDMA1_UTCL1_RD_STATUS__ADDR_RD_RTR__SHIFT 3213 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_UTCL1_RD_STATUS__ADDR_RD_RTR__SHIFT                                                             0x18
SDMA1_UTCL1_RD_STATUS__ADDR_RD_RTR__SHIFT  726 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_UTCL1_RD_STATUS__ADDR_RD_RTR__SHIFT	0x1d
SDMA1_UTCL1_RD_STATUS__ADDR_RD_RTR__SHIFT  744 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_UTCL1_RD_STATUS__ADDR_RD_RTR__SHIFT                                                             0x1d
SDMA1_UTCL1_RD_STATUS__ADDR_RD_RTR__SHIFT  740 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_UTCL1_RD_STATUS__ADDR_RD_RTR__SHIFT                                                             0x1d