SDMA1_UTCL1_INV0__WR_TIMEOUT__SHIFT  816 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_UTCL1_INV0__WR_TIMEOUT__SHIFT	0x2
SDMA1_UTCL1_INV0__WR_TIMEOUT__SHIFT  834 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_UTCL1_INV0__WR_TIMEOUT__SHIFT                                                                   0x2
SDMA1_UTCL1_INV0__WR_TIMEOUT__SHIFT  830 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_UTCL1_INV0__WR_TIMEOUT__SHIFT                                                                   0x2