SDMA1_UTCL1_CNTL__VADDR_WATERMK__SHIFT 3174 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_UTCL1_CNTL__VADDR_WATERMK__SHIFT                                                                0x1d
SDMA1_UTCL1_CNTL__VADDR_WATERMK__SHIFT  685 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_UTCL1_CNTL__VADDR_WATERMK__SHIFT	0x1d
SDMA1_UTCL1_CNTL__VADDR_WATERMK__SHIFT  703 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_UTCL1_CNTL__VADDR_WATERMK__SHIFT                                                                0x1d
SDMA1_UTCL1_CNTL__VADDR_WATERMK__SHIFT  699 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_UTCL1_CNTL__VADDR_WATERMK__SHIFT                                                                0x1d