SDMA1_UCODE_DATA__VALUE__SHIFT 40100 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_UCODE_DATA__VALUE__SHIFT                                                                        0x0
SDMA1_UCODE_DATA__VALUE__SHIFT 1356 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_UCODE_DATA__VALUE__SHIFT 0x0
SDMA1_UCODE_DATA__VALUE__SHIFT 1508 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_UCODE_DATA__VALUE__SHIFT 0x0
SDMA1_UCODE_DATA__VALUE__SHIFT 2012 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_UCODE_DATA__VALUE__SHIFT 0x0
SDMA1_UCODE_DATA__VALUE__SHIFT 2316 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_UCODE_DATA__VALUE__SHIFT 0x0
SDMA1_UCODE_DATA__VALUE__SHIFT   30 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_UCODE_DATA__VALUE__SHIFT	0x0
SDMA1_UCODE_DATA__VALUE__SHIFT   30 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_UCODE_DATA__VALUE__SHIFT                                                                        0x0
SDMA1_UCODE_DATA__VALUE__SHIFT   30 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_UCODE_DATA__VALUE__SHIFT                                                                        0x0