SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 2992 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK                                                                    0x00000010L
SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 1435 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 0x10
SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 1595 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 0x10
SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 2113 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 0x10
SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 2417 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 0x10
SDMA1_STATUS_REG__RB_CMD_IDLE_MASK  512 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK	0x00000010L
SDMA1_STATUS_REG__RB_CMD_IDLE_MASK  514 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK                                                                    0x00000010L
SDMA1_STATUS_REG__RB_CMD_IDLE_MASK  510 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK                                                                    0x00000010L