SDMA1_STATUS_REG__INT_IDLE__SHIFT 2986 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h #define SDMA1_STATUS_REG__INT_IDLE__SHIFT                                                                     0x1e
SDMA1_STATUS_REG__INT_IDLE__SHIFT 1478 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define SDMA1_STATUS_REG__INT_IDLE__SHIFT 0x1e
SDMA1_STATUS_REG__INT_IDLE__SHIFT 1642 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define SDMA1_STATUS_REG__INT_IDLE__SHIFT 0x1e
SDMA1_STATUS_REG__INT_IDLE__SHIFT 2160 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define SDMA1_STATUS_REG__INT_IDLE__SHIFT 0x1e
SDMA1_STATUS_REG__INT_IDLE__SHIFT 2464 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define SDMA1_STATUS_REG__INT_IDLE__SHIFT 0x1e
SDMA1_STATUS_REG__INT_IDLE__SHIFT  506 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_0_sh_mask.h #define SDMA1_STATUS_REG__INT_IDLE__SHIFT	0x1e
SDMA1_STATUS_REG__INT_IDLE__SHIFT  508 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_2_sh_mask.h #define SDMA1_STATUS_REG__INT_IDLE__SHIFT                                                                     0x1e
SDMA1_STATUS_REG__INT_IDLE__SHIFT  504 drivers/gpu/drm/amd/include/asic_reg/sdma1/sdma1_4_2_sh_mask.h #define SDMA1_STATUS_REG__INT_IDLE__SHIFT                                                                     0x1e